FPGA FIELD-PROGRAMMABLE GATE ARRAY

FPGA FIELD-PROGRAMMABLE GATE ARRAY
SPECIFICATION:
1.    The trainer must come complete with a comprehensive hardware / software / documentation package, providing everything for CPLD/FPGA introduction. This unit must be introduce primarily as cost effective method to learn CPLD/FPGA programming and system.

2.    The system should be;
a.    Run on PC or compatible, with no need of extra hardware.
b.    Provide a complete training from logic design to PC simulation, programming in VHDL/Verilog HDL and schematic drawing diagram and testing.
c.    Allowing users to complete the development process from writing and assembling a program debugging and evaluating it to on the target PLD all from a single PC Compatible.
d.    Additionally the unit will program more than 40 types of PLD’s.
e.    Easy-to-use menu driven original software   to run under DOS.                
f.    Communicate via a standard serial port, no expansion slots.
g.    Manufacturers high speed algorithms supported for fast programming and testing the PLD
h.    No voltage adjustments required of DIL switches to set up.
i.    Using USB JTAG for communication and JTAG download, software package and comprehensive operating, experimental manuals in English supplied in each unit.
j.    Additional manual gives instruction for use with the range of set.

The application provides facilities for testing the PLD such as

•    Frequency generator with Frequency: 1/10/100/1K/10K/100K/1M/10MHz,
•    2 x16 LCD Display,
•    Fourteen Dice Pattern LEDs for Dice game application,
•    6-digit 7Segment Display,
•    Eight Logic Input Switches  Depressed Type with Light Indicator ,
•    8 x 8 Dual Color Dot Matrix Display,
•    Two –ve pulse switches; with indicator ,
•    Two +ve pulse switches; with indicator,   
•    3 x 4 Button Matrix Keypad,
•    Buzzer
•    A/D Converter
•    D/A Converter
•    Socket for optional 8051 MCU
•    Dual Color Dot Matrix Display
12 output LED display in traffic light color LEDs